4.4.3
Internal Self-Test
During PSI5 Initialization Phase 2 and Phase 3, the device completes it’s internal self-test as described below and shown in
Figure 32 .
? Self-Test Phase 1 - Raw Offset Calculation
– The average offset is calculated for t ST1 (Self-Test Disabled).
– If the INIT2_EXT bit is set, this 10-bit value is transmitted in Initialization Phase 2 (reference Section 4.4.2 ).
? Self-Test Phase 2 - Self-Test Deflection Verification
The offset cancellation value is frozen for t ST2 + 2ms
Self-Test is enabled
After t ST2 /2, the acceleration output value is averaged for t ST2 /2 to determine the self-test value
If the INIT2_EXT bit is set, this10-bit value is transmitted in Initialization Phase 2 (reference Section 4.4.2 ).
The self-test value is compared against the limits specified in Section 2.5
Self-Test is disabled
? Self-Test Phase 3 - Self-Test Normal Data Calculation
– The average offset is calculated for t ST3
– If Self-Test passed, the device advances to normal mode
– If Self-Test failed, the device repeats Self-Test Phases 1 through 3 up to ST_RPT times.
4.4.4
Initialization Phase 3
t PSI5INIT3 = ROUNDUP ? ? --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + 2 ? ? × t S – S
t
During PSI5 initialization phase 3, the device completes it’s internal self checks, and transmits a combination of “Sensor Busy”,
“Sensor Ready”, or “Sensor Defect” messages as defined in Table 8 . The number of messages transmitted in initialization phase
3 varies depending on the mode of operation, and the number of self-test repetitions. Self-Test is repeated on failure up to
ST_RPT times to provide immunity to misuse inputs during initialization. Self-Test terminates successfully after one successful
self-test sequence.
Table 13 shows the nominal Initialization Phase 3 times for different operating modes and self-test repeats. Times are calcu-
lated using the following equation.
( t INTINIT + t OC1 + t OC2 + ( t ST1 + t ST2 + t ST3 ) × ( STRPT + 1 ) ) – ( t PSI5INIT1 + t PSI5INIT2xx )
S – S
Table 13. Initialization Phase 3 Time
Operating Mode
8-Bit Asynchronous Mode 0 (228 μ s)
10-Bit Asynchronous Mode 0 (228 μ s)
8-Bit Synchronous Mode (500 μ s)
10-Bit Synchronous Mode (500 μ s)
Self-Test
Repetitions
0
1
2
3
4
5
0
1
2
3
4
5
0
1
2
3
4
5
0
1
2
3
4
5
# of Sensor Busy
Messages
0
359
780
1201
1622
2043
2
423
844
1265
1686
2107
0
138
330
522
714
906
0
170
362
554
746
938
# of Sensor Ready or Sensor
Defect Messages
2
Nominal Phase 3
Time (ms)
0.46
82.31
178.30
274.28
370.27
466.26
0.91
96.90
192.89
288.88
384.86
480.85
1.00
70.00
166.00
262.00
358.00
454.00
1.00
86.00
182.00
278.00
374.00
470.00
MMA52xxKW
Sensors
42
Freescale Semiconductor, Inc.
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